1. Field of the Invention
The present invention relates to a voltage controlled oscillator with a switching bias, and more specifically, to a voltage controlled oscillator to which a switching bias technique is applied so as to enhance phase noise characteristics and stabilize the magnitude of an oscillation waveform.
The present invention is derived from a project entitled “Development of Digital RF and ADC Chips for Multi-Mode SDR Terminal [2006-S-015-01]” conducted as an IT R&D program for the Ministry of Information and Communication (Republic of Korea).
2. Discussion of Related Art
In general, a voltage controlled oscillator means an oscillator which changes the capacitance of a variable capacitor through voltage adjustment, thereby adjusting a frequency. Such a voltage controlled oscillator is an essential part of all electric communication systems and may be used when a frequency of a predetermined signal is up-converted or down-converted.
FIG. 1 is a circuit diagram of a conventional voltage controlled oscillator, and specifically, a voltage controlled oscillator for preventing flicker noise of a bias circuit.
As shown in FIG. 1, the voltage controlled oscillator 10 includes an LC resonance circuit 12, a loss compensation circuit 14 for compensating for a loss, and a bias circuit 16 for supplying a bias current. The connection relationship between the respective circuits will be briefly described as follows.
First and second inductors L1 and L2 are respectively connected between a power supply terminal VDD, and a first node Q11 and a second node Q12. A first varactor CV1 is connected between a voltage control terminal VC and the first node Q11, and a second varactor CV2 is connected between the voltage control terminal VC and the second node Q12. Drain, gate, and source terminals of a first NMOS transistor M1 are connected to the first node Q11, the second node Q12 and a third node Q13, respectively. Drain, gate, and source terminals of a second NMOS transistor M2 are connected to the second node Q12, the first node Q11 and the third node Q13, respectively. A third inductor L3 is connected between the third node Q13 and a fourth node Q14 and a first capacitor C1 is connected between the third node Q13 and a ground terminal GND. Drain, gate, and source terminals of a third NMOS transistor M3 are connected to the fourth node Q14, a bias voltage terminal VB, and the ground terminal GND, respectively. A second capacitor C2 is connected between the fourth node Q14 and the ground terminal GND.
In the voltage controlled oscillator 10 configured in such a manner, when flicker noise of the bias circuit 16 is up-converted into an oscillation waveform, phase noise characteristics may be reduced.
To solve such a problem, a method has been disclosed in which the third inductor L3 and the first capacitor C1 are connected in parallel to each other between the loss compensation circuit 14 and the bias circuit 16, and are caused to resonate at two times greater oscillation frequency such that the third node Q13 has a high impedance value at two times greater oscillation frequency. Then, the flicker noise generated from the bias circuit 16 has a small effect on the oscillation node.
This is implemented through the result of research in which, when a parallel LC resonance circuit was provided between a loss compensation circuit and a bias circuit such that the resonance frequency thereof became two times larger than an oscillation frequency, it was possible to lower flicker noise of the bias circuit which had an effect on an oscillation waveform. The result of the research is disclosed in “A Filtering Technique to Lower LC Oscillator Phase Noise” (IEEE Journal of Solid-State Circuits, December, 2001) by Emad Hegazi.
In the above-described voltage controlled oscillator 10, however, the inductor L3 with a large volume should be used. Therefore, when an integrated circuit is designed, a chip area inevitably increases. Further, other frequency components, excluding a two times greater frequency than the oscillation frequency, are not suppressed at the third node Q13.
Further, since the magnitude of the oscillation waveform significantly changes with respect to changes in external conditions, such as frequency tuning, a process change, a temperature change, and so on, the operation of the voltage controlled oscillator is unstabilized.